What is paging?
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Interviewers use this question to quickly assess whether a candidate has the foundational knowledge required for Operating Systems development. It reveals whether you understand the building blocks that more complex concepts rely on.
Answer
Paging is a memory management scheme that eliminates the need for contiguous physical memory allocation by dividing virtual memory into fixed-size blocks called pages and physical memory into same-size blocks called frames. How it works: Virtual address is split into: [Page Number | Offset]. Page number indexes into the page table to find the frame number. Physical address = [Frame Number | Offset]. Example (page size = 4KB = 2^12 bytes): virtual address 12290 (0x3002) → page 3, offset 2. If page 3 maps to frame 7 → physical address = 7 × 4096 + 2 = 28674. Page table: OS maintains one per process. Entry contains: valid/invalid bit (is page in RAM?), frame number, access rights (read/write/execute), dirty bit (has page been modified?), reference bit (has page been accessed recently?). TLB (Translation Lookaside Buffer): small, fast hardware cache of recent address translations. TLB hit (page found in TLB): 1 memory access. TLB miss (page not in TLB): access page table in RAM (extra memory access), update TLB. TLB hit rate typically 99%+. Multi-level page tables: a single-level page table for 64-bit addresses would be enormous. Solution: hierarchical page tables (2, 3, or 4 levels). x86-64 uses 4-level paging (PML4, PDPT, PD, PT). Page size trade-off: larger pages = smaller page table, but more internal fragmentation. Advantages over segmentation: no external fragmentation; simpler physical memory allocation (any free frame).
Pro Tip
This topic has Operating Systems-specific nuances that differ from general programming. Highlighting those nuances in your answer shows expertise rather than generic knowledge.