Advanced
Assembly Language
Q69 / 100
What is AARCH64 (ARM64) and how does it differ from x86-64?
Correct! Well done.
Incorrect.
The correct answer is B) ARM's 64-bit RISC ISA with 31 general-purpose registers, fixed 32-bit instruction encoding, and explicit load/store architecture
B
Correct Answer
ARM's 64-bit RISC ISA with 31 general-purpose registers, fixed 32-bit instruction encoding, and explicit load/store architecture
Explanation
AArch64 has 31 GPRs (x0-x30), a fixed 4-byte instruction size, explicit load/store (no memory-operand ALU), and uses a link register (x30) for call/return.
Progress
69/100