What is "wavefront" or "warp" scheduling in GPU architectures, and how does it relate to SIMD execution?
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Incorrect.
The correct answer is A) GPUs group threads into fixed-size batches (warps/wavefronts) executing the same instruction in lockstep across data lanes (SIMD); divergence (threads taking different branches) is handled by running both paths and masking inactive lanes
Correct Answer
GPUs group threads into fixed-size batches (warps/wavefronts) executing the same instruction in lockstep across data lanes (SIMD); divergence (threads taking different branches) is handled by running both paths and masking inactive lanes
GPUs achieve massive parallelism by executing groups of threads (warps/wavefronts) in SIMD fashion; when threads within a warp diverge at a branch, the hardware executes both paths sequentially with lane masking, which can reduce efficiency for divergent code.