What is the difference between an "SR flip-flop" and a "D flip-flop"?
Correct! Well done.
Incorrect.
The correct answer is A) An SR flip-flop has separate Set and Reset inputs that can create an invalid/undefined state if both are asserted; a D flip-flop has a single data input and a clock, eliminating the invalid-state problem by always taking the value of D on the clock edge
Correct Answer
An SR flip-flop has separate Set and Reset inputs that can create an invalid/undefined state if both are asserted; a D flip-flop has a single data input and a clock, eliminating the invalid-state problem by always taking the value of D on the clock edge
The D flip-flop is often built from an SR (or JK) flip-flop with added logic to ensure S and R are never both 1 simultaneously, simplifying design by guaranteeing a well-defined next state based purely on the D input.